Stephen Craven and Peter Athanas, "A High-Level Development Framework for Run-Time Reconfigurable Applications", Proceedings of the 9th Annual Conference on Military and Aerospace Programmable Logic Devices, MAPLD 2006, Washington, DC, Sep 2006.
Dynamically modifying computational hardware during operation has long held great promise for increasing the performance and reducing cost. However, designing Run-Time Reconfigurable (RTR) applications has been prohibitively difficult. Recent advances in FPGA architectures and implementation tools better support dynamic hardware development. This project presents the foundation of an integrated development environment for dynamic hardware applications that raises the level of abstraction from the gate-level to a high-level specification. By extending a commercial high-level synthesis tool, the presented methodology permits RTR applications to be created directly from a high-level description.
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